# VLSI Design & Automation Lab

Welcome to the UC Santa Cruz VLSI Design Automation (VLSI-DA) group web page. VLSI-DA was founded at UC Santa Cruz in Fall 2006. The primary research focus of the group is on physical design, circuits, and algorithms research for Computer-Aided Design (CAD) tools for large-scale circuit optimization. Topics being investigated include design for low-power circuits, variability and reliability, thermal-aware design, and error tolerant circuit design.

## OpenRAM

The OpenRAM project aims to provide a free, open-source memory compiler development framework for Random-Access Memories (RAMs). It is a joint development project between University of California Santa Cruz and Oklahoma State University to enable memory and computer system research by creating an open-source compiler infrastructure.

Related papers:

- M. R. Guthaus, J. E. Stine, S. Ataei, B. Chen, B. Wu, M. Sarwar, “OpenRAM: An Open-Source Memory Compiler,” Proceedings of the 35th International Conference on Computer-Aided Design (ICCAD), 2016
- S. Ataei, J. Stine, M. Guthaus, “A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS,” International Conference on Computer Design (ICCD), 2016, pp. 499-506.
- E. Ebrahimi, M. Guthaus, J. Renau, “Timing Speculative SRAM”, IEEE In- ternational Symposium on Circuits and Systems (ISCAS), 2017

## Current-Mode Clocking

In a high-performance computer system design, the clock network consumes a significant amount of power and causes the most switching noise. High power consumption requires larger batteries while switching noise degrades the accuracy of sensitive sensor measurements in modern Systems-on-Chips. Prof. Matthew Guthaus, faculty in Computer Engineering, and his graduate student Riadul Islam, now a faculty at University of Michigan Dearborn, have developed the concept of a current-mode clock distribution to address these problems. Current-mode clocking senses current flow rather than a traditional voltage swing in clock wires and thereby eliminates most of the noise and power problems in traditional clock distribution schemes. Current-mode clocking simultaneously increases the potential maximum speeds of computer chips for performance improvements. Related papers:

- R. Islam, M. R. Guthaus, “HCDN: Hybrid-Mode Clock Distribution Networks”, IEEE Transactions on Circuits and Systems I: Regular Papers, 2018.
- R. Islam, H. Fahmy, P. Lin, M. R. Guthaus, “DCMCS: Highly Robust Low-Power Differential Current-Mode Clocking and Synthesis”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2018.
- R. Islam, M. R. Guthaus, “Current-Mode Clock Distribution,” IEEE Inter- national Symposium on Circuits and Systems (ISCAS), 2014, pp. 1203-1206.
- R. Islam, H. Fahmy, P.-Y. Lin, M. R. Guthaus, “Differential Current-Mode Clock Distribution,” Midwest Symposium on Circuits and Systems (MWSCAS), 2015, pp. 1-4.
- R. Islam, M. R. Guthaus, “Low-Power Clock Distribution Using a Current- Pulsed Clocked Flip-Flop,” IEEE Transactions on Circuits and Systems I (TCAS-I), Volume 62, Issue 4, April 2015, pp. 1156-1164.
- R. Islam, M. R. Guthaus, “CMCS: Current-Mode Clock Synthesis,” IEEE Transactions on VLSI (TVLSI), Volume 25, Issue 3, September 2016, pp. 1054-1062.

## Resonant and Charge-Recovery Clocking

- H. Fahmy, P.-Y. Lin, R. Islam, M. R. Guthaus, “Switched Capacitor Quasi- Adiabatic Clocks,” IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1398-1401.
- P.-Y.Lin,H.Fahmy,R.Islam,M.R.Guthaus,“LC Resonant Clock Resource Minimization using Compensation Capacitance,” IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1406-1409.
- B. Lacara, P.-Y. Lin, M. R. Guthaus, “Multi-Frequency Resonant Clocks,” IEEE International Symposium on Circuits and Systems (ISCAS), 2015, pp. 1402- 1405.
- X. Hu, M. R. Guthaus, “Distributed LC Resonant Clock Grid Synthesis,” IEEE Transactions on Circuits and Systems I (TCAS-I), Volume 59, Number 11, November 2012, pp. 2749-2760.

## Electromagnetic Interference

- D. Gorman, M. R. Guthaus, J. Renau, “Architectural opportunities for novel dynamic EMI shifting (DEMIS)", IEEE/ACM International Symposium on Microarchitecture, 2017.
- X. Hu, M.R. Guthaus, “Clock tree optimization for electromagnetic compatibility (EMC)", Asia and South Pacific Design Automation Conference, 2011.