Students and Alumni

Current Students

• Jesse Cirimelli-Low PhD
• Eren Dogan PhD
• Hadir Khan PhD
• Bugra Onal PhD
• Ethan Sifferman PhD
• Farhad Modarresi PhD
• Wajid Malik PhD
• Paolo Pedroso BS
• Arya Thottiparambil Manikandan MS

Alumni

• Benjamin Goldblatt, MS (HighTide) MS
• Lee-Way Wang, MS (Latch-Based Retiming) MS
• Sage Walker, 2023, BS (OpenROM), Atomic Machines BS
• Sam Crow, 2023, MS (Delay-Based SRAM Control Logic in OpenRAM), NVIDIA MS
• Hunter Nichols, 2022, MS (Statistical Modeling of SRAMs), Qualcomm MS
• Aditi Sinha, 2020, MS (Built-In Self-Repair for OpenRAM Memories), NVIDIA MS
• Jennifer Sowash, 2020, MS (Design of a RISC-V Processor with OpenRAM Memories), Achronyx MS
• Jesse Cirimelli-Low, 2020, BS (OpenRAM) BS
• Joey Kunzler, 2020, BS, AMD BS
• Hany Fahmy, 2019, MS (Switched Capacitor Quasi-adiabatic Clocks) MS
• Michael Grimes, 2018, MS (Multi-port Automation for SRAM Compiler Design), Achronix Semiconductor MS
• Kyle Cordes, 2018, MS (A Study into the Feasability of Biometric Identification through ECG), Joby Aviation MS
• Rebecca Rashkin, 2018, MS (Impact of Audio on Heart Rate Variability), Raytheon MS
• Riadul Islam, 2017, PhD (Current Mode Clocking and Synthesis considering Low Power and Skew), Assistant Professor, University of Michigan Dearborn PhD
• Rajsaktish Sankaranarayanan, 2017, PhD ( Reducing Variability in Subthreshold Circuits), Intel PhD
• Brian Chen, 2016, MS, Altera/Intel MS
• Han Chen, 2016, MS, Intel MS
• Jie Zhang, 2015, MS, Yodlee, Inc. MS
• Benjamin Lacara, 2014, MS, EMC Corporation MS
• Jeff Butera, 2013, MS, Mentor Graphics MS
• Sheldon Logan, 2013, PhD ( Thermal-Aware CAD for Modern Integrated Circuits ), Google PhD
• Seokjoong Kim, 2012, PhD (Low-Power Methodology for Fault Tolerant Nanoscale Memory Design), Oracle PhD
• Xuchu Hu, 2012, PhD (Analysis and Application of Inductance in Clock Distribution Networks), Cadence Design Systems PhD
• Kathryn Dobbins, 2011, SURF-IT, Michigan Tech -> U Michigan (grad school, Fall 2012)
• Walter “Jas” Condley, 2011, MS (Analysis of High-Frequency Clock Trees with a Methodology for Local Resonant Clock Synthesis), Space Systems Loral MS
• Curtis Andrus, 2010, MS (Lithography-Aware Layout Compaction), Gauda Inc. -> ListenLogic MS
• Derek Chan, 2010, MS (Analysis of Power Supply Induced Jitter in Actively De-skewed Multi-Core Systems), Space Systems Loral MS
• Keven Woo, 2010, MS (Fault-Tolerant Synthesis using Non-Uniform Redundancy), Intel MS
• Suparna Das, 2008, MS MS

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