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Prospective students: Please check out this information!

I’m a Professor at UC Santa Cruz in the area of chip design and electronic design automation (EDA). I’m the lead PI of the VLSI Design and Automation Lab as well as a member of the Hardware Systems Collective.

Our research sits at the intersection of chip design and electronic design automation (EDA). We focus on physical design, circuits, and algorithms research, including design for low-power circuits, variability and reliability, thermal-aware design, and error-tolerant circuit design. Recently, we have been at the forefront of applying machine learning and graph neural networks (GNNs) to EDA challenges, such as GATMesh for clock mesh timing analysis, GAT-Steiner for routing prediction, and OpenGCRAM for memory compilers. Our alumni go on to work at a variety of top chip design companies, including NVIDIA, Intel, Qualcomm, AMD, Oracle, and Cadence. View our publications for more details.